Intel SoC Design Engineer - DFT in Allentown, Pennsylvania
Key responsibilities of the role include, although not limited to:
Develop and supports design for test (DFT) structures.
Determine design for test approaches and develops DFT architecture.
Design and verifies DFT structures for memories (MBIST), digital and analog circuitry.
Perform scan synthesis.
Create, simulates and verifies automatic generated test patterns (ATPG).
Create functional tests and corresponding test patterns.
Know about failure mechanisms in silicon production and creates test algorithms.
Support silicon bring up of test patterns.
Perform diagnosis of test patterns on silicon and optimizes test time.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate must have a Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related computing disciple and 4+ years of experience in: - OR - a Master's degree in Electrical/Computer Engineering, Computer Science or related computing disciple and 3+ years of experience with:
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.